1. Field of the Disclosure
The disclosure relates to a control circuit of a sense amplifier that is used in a semiconductor device, and particularly relates to a sense amplifier control circuit for suitably compensating for dependence with respect to the manufacturing process, power supply voltage, or junction temperature in a MOS (metal-oxide-semiconductor) transistor that constitutes a sense amplifier; to a sense amplifier control method; and to a data processing system.
2. Description of Related Art
A conventional technique is known that includes a memory cell array in which memory cells are arranged in a matrix, a bit line for connecting the memory cells in the same row in common, a pre-charge circuit for presenting a pre-charge potential to the bit line when data is read, and a first sense amplifier for amplifying the data read to the bit line; wherein the first sense amplifier discriminates between the data read to the bit line using the pre-charge potential presented to the bit line by the pre-charge circuit as a reference potential (see Japanese Patent Application Laid-Open No. 2007-172779, for example).